The silicon bipolar transistor has been the device of choice for high power applications in motor drive circuits, appliance controls, robotics and lighting ballasts. This is because bipolar transistors can be designed to handle relatively large current densities in the range of 40-50 A/cm.sup.2 and support relatively high blocking voltages in the range of 500-1000V.
Despite the attractive power ratings achieved by bipolar transistors, there exist several fundamental drawbacks to their suitability for all high power applications. First of all, bipolar transistors are current controlled devices which require relatively large base currents, typically one fifth to one tenth of the collector current, to maintain the transistor in an operating mode. Proportionally larger base currents can be expected for applications which also require high speed turn-off. Because of the large base current demands, the base drive circuitry for controlling turn-on and turn-off is relatively complex and expensive. Bipolar transistors are also vulnerable to premature breakdown if a high current and high voltage are simultaneously applied to the device, as commonly required in inductive power circuit applications. Furthermore, it is relatively difficult to operate bipolar transistors in parallel because current diversion to a single transistor typically occurs at high temperatures, making emitter ballasting schemes necessary.
The silicon power MOSFET was developed to address this base drive problem. In a power MOSFET, the gate electrode provides turn-on and turn-off control upon the application of an appropriate gate bias. For example, turn-on in an N-type enhancement MOSFET occurs when a conductive N-type inversion layer is formed in the P-type channel region in response to the application of a positive gate bias. The inversion layer electrically connects the N-type source and drain regions and allows for majority carrier conduction therebetween.
The power MOSFET's gate electrode is separated from the channel region by an intervening insulating layer, typically silicon dioxide. Because the gate is insulated from the channel region, little if any gate current is required to maintain the MOSFET in a conductive state or to switch the MOSFET from an on-state to an off-state or vice-versa. The gate current is kept small during switching because the gate forms a capacitor with the MOSFET's channel region. Thus, only charging and discharging current ("displacement current") is required during switching. Because of the high input impedance associated with the insulated-gate electrode, minimal current demands are placed on the gate and the gate drive circuitry can be easily implemented. Moreover, because current conduction in the MOSFET occurs through majority carrier transport only, the delay associated with the recombination and storage of excess minority carriers is not present. Accordingly, the switching speed of power MOSFETs can be made orders of magnitude faster than that of bipolar transistors. Unlike bipolar transistors, power MOSFETs can be designed to withstand high current densities and the application of high voltages for relatively long durations, without encountering the destructive failure mechanism known as "second breakdown". Power MOSFETs can also be easily paralleled, because the forward voltage drop of power MOSFETs increases with increasing temperature, thereby promoting an even current distribution in parallel connected devices.
It has also been considered attractive to combine the best features of power MOSFETs and bipolar transistors into a single device structure. In particular, since bipolar current conduction allows for operation at high on-state current densities with low on-state voltage drop and MOS-gate structures provide preferred gate control, it has been considered advantageous to develop devices where bipolar current transport is controlled via a MOS-gate structure. Such devices, typically referred to as insulated-gate bipolar transistors (IGBTs), have been developed to include the preferred features of bipolar transistors and power MOSFETs.
In view of these desirable characteristics of power MOSFETs and IGBTs, many variations of providing MOS-gate control have been developed. For example, as illustrated by FIG. 1, a TDMOS transistor unit cell is illustrated. As will be understood by those skilled in the art, this transistor is a type of double-diffused MOS transistor. In this device, a body region 4 of P-type conductivity is formed on an N-type substrate 1 and a more highly doped and deeper P-type contact region 2 is formed to surround the body region 4. A source region 5 of N-type conductivity is provided in the body region 4. A trench is formed by etching through the source region 5 and body region 4 using conventional techniques. A gate insulating layer 7 is formed on a sidewall and bottom of the trench. The trench is filled with a polysilicon gate electrode 3 and an oxide layer 6 covers the face of the substrate 1 and the gate electrode 3.
In order to form the TDMOS transistor, the body region 4 and contact region 2 are formed by implanting and diffusing P-type dopants using first and second implant masks. The source region 5 is formed by implanting N-type dopants using a third mask. Thereafter, the trench is formed using a fourth mask. Unfortunately, during the steps of forming the trench and the gate insulating layer 7 (which typically includes a thermal treatment step such as a thermal oxidation step), the dopants in the body region 4 and contact region 2 continue to diffuse into the substrate 1. This can cause the concentration of P-type dopants adjacent the sidewall of the trench to be lowered and the threshold voltage of the TDMOS transistor to be lowered. As will be understood by those skilled in the art, such changes can lead to a parasitic increase in leakage current during device operation.
Thus, notwithstanding the above attempts to develop power MOSFETs and MOSFET-controlled semiconductor devices, there still continues to be a need for improved semiconductor devices for power applications.